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» Routing in the frequency domain
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DATE
2006
IEEE
98views Hardware» more  DATE 2006»
14 years 4 months ago
Power-constrained test scheduling for multi-clock domain SoCs
This paper presents a wrapper and test access mechanism design for multi-clock domain SoCs that consists of cores with different clock frequencies during test. We also propose a t...
Tomokazu Yoneda, Kimihiko Masuda, Hideo Fujiwara
ESSCIRC
2011
93views more  ESSCIRC 2011»
12 years 9 months ago
12% Power reduction by within-functional-block fine-grained adaptive dual supply voltage control in logic circuits with 42 volta
— Within-functional-block fine-grained adaptive dual supply voltage control (FADVC) is proposed to reduce the power of CMOS logic circuits. Both process and design variations wi...
Atsushi Muramatsu, Tadashi Yasufuku, Masahiro Nomu...
ICMCS
2006
IEEE
144views Multimedia» more  ICMCS 2006»
14 years 4 months ago
Data Embedding in MPEG-1/Audio Layer II Compressed Domain using Side Information
In this work, we propose a data embedding scheme in MPEG1/Audio Layer II compressed domain. Data embedding is conducted every AAU by using side information (location of sub-band a...
Akihiro Matsuoka, Kiyoshi Tanaka, Akio Yoneyama, Y...
ICC
2007
IEEE
205views Communications» more  ICC 2007»
14 years 4 months ago
RLAR: Robust Link Availability Routing Protocol for Mobile Ad Hoc Networks
— Many previously proposed routing metrics and algorithms for ad hoc networks work well in static networks, however, when nodes are moving and wireless links may fail from time t...
Xueyuan Su, Sammy Chan, King Sun Chan
ICDCSW
2000
IEEE
14 years 2 months ago
Fisheye State Routing in Mobile Ad Hoc Networks
In this paper, we present a novel routing protocol for wireless ad hoc networks – Fisheye State Routing (FSR). FSR introduces the notion of multi-level fisheye scope to reduce ...
Guangyu Pei, Mario Gerla, Tsu-Wei Chen