This paper presents a wrapper and test access mechanism design for multi-clock domain SoCs that consists of cores with different clock frequencies during test. We also propose a t...
— Within-functional-block fine-grained adaptive dual supply voltage control (FADVC) is proposed to reduce the power of CMOS logic circuits. Both process and design variations wi...
In this work, we propose a data embedding scheme in MPEG1/Audio Layer II compressed domain. Data embedding is conducted every AAU by using side information (location of sub-band a...
— Many previously proposed routing metrics and algorithms for ad hoc networks work well in static networks, however, when nodes are moving and wireless links may fail from time t...
In this paper, we present a novel routing protocol for wireless ad hoc networks – Fisheye State Routing (FSR). FSR introduces the notion of multi-level fisheye scope to reduce ...