252 search results - page 40 / 51 » Runtime Verification Using a Temporal Description Logic |
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet m...
SEKE
2010
Springer
13 years 5 months ago
2010
Springer
Abstract--Property specification is still one of the most challenging tasks for transference of software verification technology like model checking. The use of patterns has been p...
CADE
2007
Springer
14 years 8 months ago
2007
Springer
Manna and Pnueli have extensively shown how a mixture of first-order logic (FOL) and discrete Linear time Temporal Logic (LTL) is sufficient to precisely state verification problem...
ENTCS
2010
13 years 5 months ago
2010
Testing and verification of asynchronously communicating objects in open environments are challenging due to non-determinism. We explore a formal approach for black-box testing by...
AMAI
2004
Springer
14 years 1 months ago
2004
Springer
The paper integrates automatically generated case-splitting expressions, and an efficient translation to CNF, in order to formally verify an out-of-order superscalar processor havi...