NATURE: a hybrid nanotube/CMOS dynamically reconfigurable architecture

Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet mature, making implementation of such circuits, at least on a large scale, in the near future infeasible. However, if photolithography could be used to implement circuits using these nanodevices, then hybrid nano/CMOS chips could be fabricated and the benefits of nanotechnology could be utilized immediately. A startup company, called Nantero, has developed and implemented a non-volatile nanotube random-access memory (NRAM) using photo-lithography that is considerably faster and denser than DRAM, has much lower power consumption than DRAM or flash, has similar speed to SRAM and is highly resistant to environmental forces (temperature, magnetism). In this paper, we propose a novel high performance reconfigurable architecture, called NATURE, that utilizes CMOS logic and NRAMs. Use of the highly-dense NRAMs allows...

• Type: Conference
• Year: 2006
• Where: DAC
• Authors: Wei Zhang, Niraj K. Jha, Li Shang
• Keywords: DAC 2006, Design Automation, Logic Folding, Performance Reconfigurable Architecture, Temporal Logic Folding