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» SAT-Based Techniques in System Synthesis
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ASPDAC
2008
ACM
101views Hardware» more  ASPDAC 2008»
14 years 26 days ago
Interconnect modeling for improved system-level design optimization
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...
WCE
2007
14 years 3 hour ago
On the Non-Gaussian Nature of Random Vehicle Vibrations
—This paper presents one of the outcomes of a research project concerned with the development of a method for synthesizing, under controlled conditions in the laboratory, the ran...
Vincent Rouillard
COMPSEC
2008
116views more  COMPSEC 2008»
13 years 11 months ago
Enforcing memory policy specifications in reconfigurable hardware
While general-purpose processor based systems are built to enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reco...
Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timo...
CHI
2004
ACM
14 years 11 months ago
Improving speech playback using time-compression and speech recognition
Despite the ready availability of digital recording technology and the continually decreasing cost of digital storage, browsing audio recordings remains a tedious task. This paper...
Sunil Vemuri, Philip DeCamp, Walter Bender, Chris ...
DATE
2009
IEEE
140views Hardware» more  DATE 2009»
14 years 5 months ago
Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors
Carbon Nanotube Field-Effect Transistors (CNFETs) show big promise as extensions to silicon-CMOS because: 1) Ideal CNFETs can provide significant energy and performance benefits o...
Subhasish Mitra, Jie Zhang, Nishant Patil, Hai Wei