103 search results - page 4 / 21 » SEU tolerant device, circuit and processor design |
CODES
2008
IEEE
13 years 9 months ago
2008
IEEE
It is well recognized that novel computational models, devices and technologies are needed in order to sustain the remarkable advancement of CMOS-based VLSI circuits and systems. ...
ISQED
2007
IEEE
14 years 1 months ago
2007
IEEE
We present a methodology for the simulation of soft errors targeting future nano-technological devices. This approach efficiently scales the failure rate of individual devices ac...
QEST
2010
IEEE
13 years 5 months ago
2010
IEEE
Traditional architecture design approaches hide hardware uncertainties from the software stack through overdesign, which is often expensive in terms of power consumption. The recen...
ISLPED
2006
ACM
14 years 1 months ago
2006
ACM
Sub-threshold operation is a compelling approach for energyconstrained applications, but increased sensitivity to variation must be mitigated. We explore variability metrics and t...
BCS
2008
13 years 9 months ago
2008
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...