Sciweavers

175 search results - page 12 / 35
» SOC Testing Methodology and Practice
Sort
View
UML
2004
Springer
14 years 3 months ago
System-on-Chip Verification Process Using UML
Abstract. In this paper, we propose a verification methodology for System-OnChip (SoC) design using Unified Modeling Language (UML). We introduce UML as a formal model to analyze a...
Qiang Zhu, Tsuneo Nakata, Masataka Mine, Kenichiro...
DATE
2004
IEEE
126views Hardware» more  DATE 2004»
14 years 1 months ago
Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
Montek Singh, Michael Theobald
ROBOCUP
1999
Springer
153views Robotics» more  ROBOCUP 1999»
14 years 1 months ago
ISocRob - Intelligent Society of Robots
Abstract. The SocRob project was born as a challenge for multidisciplinary research on broad and generic approaches for the design of a cooperative robot society, involving Control...
Rodrigo M. M. Ventura, Pedro Aparício, Carl...
ISQED
2006
IEEE
107views Hardware» more  ISQED 2006»
14 years 3 months ago
On Optimizing Scan Testing Power and Routing Cost in Scan Chain Design
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
Li-Chung Hsu, Hung-Ming Chen
ESE
2008
107views Database» more  ESE 2008»
13 years 9 months ago
Realizing quality improvement through test driven development: results and experiences of four industrial teams
Test-driven development (TDD) is a software development practice that has been used sporadically for decades. With this practice, a software engineer cycles minute-by-minute betwee...
Nachiappan Nagappan, E. Michael Maximilien, Thirum...