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DATE
2004
IEEE
154views Hardware» more  DATE 2004»
13 years 12 months ago
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
Aline Mello, Leandro Möller, Ney Calazans, Fe...
IPSN
2009
Springer
14 years 3 months ago
Automating rendezvous and proxy selection in sensornets
As the diversity of sensornet use cases increases, the combinations of environments and applications that will coexist will make custom engineering increasingly impractical. We in...
David Chu, Joseph M. Hellerstein
DATE
2009
IEEE
88views Hardware» more  DATE 2009»
14 years 3 months ago
Latency criticality aware on-chip communication
—Packet-switched interconnect fabric is a promising on-chip communication solution for many-core architectures. It offers high throughput and excellent scalability for on-chip da...
Zheng Li, Jie Wu, Li Shang, Robert P. Dick, Yihe S...
WWW
2006
ACM
14 years 9 months ago
Wake-on-WLAN
In bridging the digital divide, two important criteria are cost-effectiveness, and power optimization. While 802.11 is cost-effective and is being used in several installations in...
Nilesh Mishra, Kameswari Chebrolu, Bhaskaran Raman...
SBCCI
2005
ACM
123views VLSI» more  SBCCI 2005»
14 years 1 months ago
Fault tolerance overhead in network-on-chip flow control schemes
Flow control mechanisms in Network-on-Chip (NoC) architectures are critical for fast packet propagation across the network and for low idling of network resources. Buffer manageme...
Antonio Pullini, Federico Angiolini, Davide Bertoz...