Sciweavers

97 search results - page 12 / 20
» SRAM Cell Current in Low Leakage Design
Sort
View
ISCAS
2008
IEEE
162views Hardware» more  ISCAS 2008»
14 years 2 months ago
Spin-transfer torque magnetoresistive content addressable memory (CAM) cell structure design with enhanced search noise margin
— This paper presents a new memory cell structure for content addressable memory (CAM) based on magnetic tunneling junction (MTJ). Each CAM cell employs a pair of differential MT...
Wei Xu, Tong Zhang, Yiran Chen
DAC
2006
ACM
14 years 8 months ago
Leakage power reduction of embedded memories on FPGAs through location assignment
Transistor leakage is poised to become the dominant source of power dissipation in digital systems, and reconfigurable devices are not immune to this problem. Modern FPGAs already...
Yan Meng, Timothy Sherwood, Ryan Kastner
SOCC
2008
IEEE
106views Education» more  SOCC 2008»
14 years 2 months ago
A robust ultra-low power asynchronous FIFO memory with self-adaptive power control
First-in first-out (FIFO) memories are widely used in SoC for data buffering and flow control. In this paper, a robust ultra-low power asynchronous FIFO memory is proposed. With s...
Mu-Tien Chang, Po-Tsang Huang, Wei Hwang
ASPDAC
2005
ACM
89views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Routing track duplication with fine-grained power-gating for FPGA interconnect power reduction
Power has become an increasingly important design constraint for FPGAs in nanometer technologies, and global interconnects should be the focus of FPGA power reduction as they cons...
Yan Lin, Fei Li, Lei He
VLSID
2002
IEEE
92views VLSI» more  VLSID 2002»
14 years 8 months ago
Low Power Solution for Wireless Applications
Low standby power dissipation is the primary need for most of the wireless applications for prolonged battery life. Traditionally ASIC solutions currently address either high densi...
Sornavalli Ramanathan, Rituparna Mandal