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DATE
2010
IEEE
156views Hardware» more  DATE 2010»
14 years 24 days ago
Domain specific architecture for next generation wireless communication
—In order to solve the challenges in processor design for the next generation wireless communication systems, this paper first proposes a system level design flow for communicati...
Botao Zhang, Hengzhu Liu, Heng Zhao, Fangzheng Mo,...
SIMUTOOLS
2008
13 years 9 months ago
An 802.16 model for NS2 simulator with an integrated QoS architecture
The IEEE 802.16 technology is emerging as a promising solution for BWA due to its ability to support multimedia services and to operate in multiple physical environments. Also, wi...
Ikbal Chammakhi Msadaa, Fethi Filali, Farouk Kamou...
GLOBECOM
2008
IEEE
14 years 2 months ago
Joint Channel and Mismatch Correction for OFDM Reception with Time-interleaved ADCs: Towards Mostly Digital MultiGigabit Transce
— Time-interleaved (TI) analog-to-digital converters (ADCs) are a promising architecture for realizing the highspeed ADCs required to implement “mostly digital” receivers for...
P. Sandeep, Upamanyu Madhow, Munkyo Seo, Mark J. W...
INTEGRATION
2007
100views more  INTEGRATION 2007»
13 years 7 months ago
A fast pipelined multi-mode DES architecture operating in IP representation
The Data Encryption Standard (DES) is a cipher that is still used in a broad range of applications, from smartcards, where it is often implemented as a tamperresistant embedded co...
Sylvain Guilley, Philippe Hoogvorst, Renaud Pacale...
DSD
2004
IEEE
106views Hardware» more  DSD 2004»
13 years 11 months ago
Finite Precision Analysis of Support Vector Machine Classification in Logarithmic Number Systems
In this paper we present an analysis of the minimal hardware precision required to implement Support Vector Machine (SVM) classification within a Logarithmic Number System archite...
Faisal M. Khan, Mark G. Arnold, William M. Potteng...