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» Sampling-rate-aware noise generation
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ERSA
2006
150views Hardware» more  ERSA 2006»
13 years 9 months ago
An Area Time Efficient Field Programmable Mersenne Twister Uniform Random Number Generator
Reconfigurable computing offers an attractive solution to accelerating infrared scene simulations. In infrared scene simulations, the modeling of a number of atmospheric and optic...
Vinay Sriram, David Kearney
FCCM
2003
IEEE
210views VLSI» more  FCCM 2003»
14 years 1 months ago
Compact FPGA-based True and Pseudo Random Number Generators
Two FPGA based implementations of random number generators intended for embedded cryptographic applications are presented. The first is a true random number generator (TRNG) whic...
Kuen Hung Tsoi, K. H. Leung, Philip Heng Wai Leong
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
14 years 2 months ago
Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers
—This paper shows that, for a given power budget, a shift register based multi-phase clock generator (MPCG) generates less jitter than a delay-locked loop (DLL) equivalent when b...
Xiang Gao, Eric A. M. Klumperink, Bram Nauta
VLSID
2007
IEEE
160views VLSI» more  VLSID 2007»
14 years 8 months ago
Spectral RTL Test Generation for Microprocessors
We introduce a novel method of test generation for microprocessors at the RTL using spectral methods. Test vectors are generated for RTL faults, which are the stuck-at faults on i...
Nitin Yogi, Vishwani D. Agrawal
AMC
2007
80views more  AMC 2007»
13 years 8 months ago
A dynamic generating graphical model for point-sets matching
This paper presents a new dynamic generating graphical model for point-sets matching. The existing algorithms on graphical models proved to be quite robust to noise but are suscep...
Xuan Zhao, Shengjin Wang, Xiaoqing Ding