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DATE
2002
IEEE
69views Hardware» more  DATE 2002»
14 years 1 months ago
Flip-Flop and Repeater Insertion for Early Interconnect Planning
We present a unified framework that considers flipflop and repeater insertion and the placement of flipflop/repeater blocks during RT or higher level design. We introduce the...
Ruibing Lu, Guoan Zhong, Cheng-Kok Koh, Kai-Yuan C...
CSL
2001
Springer
14 years 24 days ago
Constrained Hyper Tableaux
Hyper tableau reasoning is a version of clausal form tableau reasoning where all negative literals in a clause are resolved away in a single inference step. Constrained hyper table...
Jan van Eijck
IWPC
2000
IEEE
14 years 21 days ago
A Pattern Matching Framework for Software Architecture Recovery and Restructuring
This paper presents a framework for software architecture recovery and restructuring. The user specifies a high level abstraction view of the system using a structured pattern la...
Kamran Sartipi, Kostas Kontogiannis, Farhad Mavadd...
ICRA
1998
IEEE
97views Robotics» more  ICRA 1998»
14 years 17 days ago
Design of a Partitioned Visual Feedback Controller
Image-based servozng systems are often used to track moving targets and their underlying control architecture is a regulation of the image. This regulation is a function of rigid ...
Paul Y. Oh, Peter K. Allen
DAC
1989
ACM
14 years 11 days ago
Scheduling and Binding Algorithms for High-Level Synthesis
- New algorithms for high-level synthesis are presented. The first performs scheduling under hardware resource constraints and improves on commonly used list scheduling techniques ...
Pierre G. Paulin, John P. Knight