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» Saturating Counters: Application and Design Alternatives
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ARITH
2003
IEEE
14 years 4 months ago
Saturating Counters: Application and Design Alternatives
We define a new class of parallel counters, Saturating Counters, which provide the exact count of the inputs that are 1 only if this count is below a given threshold. Such counte...
Israel Koren, Yaron Koren, Bejoy G. Oomman
ARITH
2005
IEEE
14 years 4 months ago
Synthesis of Saturating Counters Using Traditional and Non-Traditional Basic Counters
Saturating counters are a newly defined class of generalized parallel counters that provide the exact number of inputs which are equal to 1 only if this number is below a given t...
Zhaojun Wo, Israel Koren
IISWC
2009
IEEE
14 years 5 months ago
Understanding PARSEC performance on contemporary CMPs
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
Major Bhadauria, Vincent M. Weaver, Sally A. McKee
PDP
2005
IEEE
14 years 4 months ago
Memory Bandwidth Aware Scheduling for SMP Cluster Nodes
Clusters of SMPs are becoming increasingly common. However, the shared memory design of SMPs and the consequential contention between system processors for access to main memory c...
Evangelos Koukis, Nectarios Koziris
ICPADS
2006
IEEE
14 years 5 months ago
Memory and Network Bandwidth Aware Scheduling of Multiprogrammed Workloads on Clusters of SMPs
Symmetric Multiprocessors (SMPs), combined with modern interconnection technologies are commonly used to build cost-effective compute clusters. However, contention among processor...
Evangelos Koukis, Nectarios Koziris