212 search results - page 7 / 43 » Scalable Hardware Architecture for Real-Time Dynamic Program... |
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
AHS
2006
IEEE
14 years 1 months ago
2006
IEEE
The application of evolutionary techniques to the design of custom processing elements bears a strong relation to the natural process that led to the co-evolution of cells and gen...
ISSS
2002
IEEE
14 years 8 days ago
2002
IEEE
This paper presents a new technique for global energy optimization through coordinated functional partitioning and speed selection for embedded processors interconnected by a high...
ECBS
1996
IEEE
13 years 11 months ago
1996
IEEE
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...