2020 search results - page 16 / 404 » Scalable Instruction-Level Parallelism. |
ISCA
2010
IEEE
13 years 7 months ago
2010
IEEE
As the effective limits of frequency and instruction level parallelism have been reached, the strategy of microprocessor vendors has changed to increase the number of processing ...
APCSAC
2001
IEEE
14 years 14 days ago
2001
IEEE
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
ASAP
2004
IEEE
14 years 17 days ago
2004
IEEE
Large register file with multiple ports is a critical component of a high-performance processor. A large number of registers are necessary for processing a larger number of in-fli...
PODC
2011
ACM
12 years 11 months ago
2011
ACM
Maintaining data structure semantics of concurrent queues such as first-in first-out (FIFO) ordering requires expensive synchronization mechanisms which limit scalability. Howev...
ASPLOS
2012
ACM
12 years 4 months ago
2012
ACM
Software developers commonly exploit multicore processors by building multithreaded software in which all threads of an application share a single address space. This shared addre...