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» Scalable and Structured Scheduling
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104
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ISCA
2003
IEEE
144views Hardware» more  ISCA 2003»
15 years 8 months ago
Half-Price Architecture
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...
Ilhyun Kim, Mikko H. Lipasti
ITCC
2003
IEEE
15 years 8 months ago
Timed Petri Net Representation of the Synchronized Multimedia Integration Language (SMIL) of XML
A multimedia server needs to satisfy the temporal ordering of multimedia data streams when servicing a client. Multimedia data has high bandwidth requirements, and within a networ...
Soon Myoung Chung, Anil L. Pereira
119
Voted
ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
15 years 8 months ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
MM
2003
ACM
161views Multimedia» more  MM 2003»
15 years 8 months ago
MuSA.RT: music on the spiral array. real-time
We present MuSA.RT, Opus 1, a multimodal interactive system for music analysis and visualization using the Spiral Array model. Real-time MIDI input from a live performance is proc...
Elaine Chew, Alexandre R. J. François
127
Voted
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
15 years 8 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi