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ISCA
2012
IEEE
237views Hardware» more  ISCA 2012»
11 years 10 months ago
BOOM: Enabling mobile memory based low-power server DIMMs
To address the real-time processing needs of large and growing amounts of data, modern software increasingly uses main memory as the primary data store for critical information. T...
Doe Hyun Yoon, Jichuan Chang, Naveen Muralimanohar...
ICPP
2008
IEEE
14 years 2 months ago
Scalable Techniques for Transparent Privatization in Software Transactional Memory
—We address the recently recognized privatization problem in software transactional memory (STM) runtimes, and introduce the notion of partially visible reads (PVRs) to heuristic...
Virendra J. Marathe, Michael F. Spear, Michael L. ...
BMCBI
2010
198views more  BMCBI 2010»
13 years 7 months ago
ClustalXeed: a GUI-based grid computation version for high performance and terabyte size multiple sequence alignment
Background: There is an increasing demand to assemble and align large-scale biological sequence data sets. The commonly used multiple sequence alignment programs are still limited...
Taeho Kim, Hyun Joo
DAC
2008
ACM
14 years 8 months ago
Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array fo
: Spin-Torque Transfer Magnetic RAM (STT MRAM) is a promising candidate for future universal memory. It combines the desirable attributes of current memory technologies such as SRA...
Jing Li, Charles Augustine, Sayeef S. Salahuddin, ...
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
14 years 4 months ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...