We present a general scheme for virtualizing main memory errorcorrection mechanisms, which map redundant information needed to correct errors into the memory namespace itself. We ...
TimesTen Performance Software's Front-Tier product is an application-tier data cache that inter-operates with disk-based relational database management systems (RDBMSs) to ac...
— We use a novel virtualization-based approach for computer architecture performance analysis. We present a case study analyzing a hypothetical hybrid main memory, which consists...
Dong Ye, Aravind Pavuluri, Carl A. Waldspurger, Br...
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
William Enck, Kevin R. B. Butler, Thomas Richardso...
Current high performance computer systems use complex, large superscalar CPUs that interface to the main memory through a hierarchy of caches and interconnect systems. These CPU-c...