770 search results - page 10 / 154 » Scalable stochastic processors |
ICPADS
2006
IEEE
14 years 1 months ago
2006
IEEE
—Recently, high-end reconfigurable computing systems that employ Field-Programmable Gate Arrays (FPGAs) as hardware accelerators for general-purpose processors have been built. T...
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
DAGSTUHL
2004
13 years 8 months ago
2004
The synchronous language Esterel is an established language for developing reactive systems. It gives an abstract, well-defined and executable description of the application, and c...
ARCS
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. This paper presents a scalable and partitionable asynchronous bus arbiter for use with chip multiprocessors (CMP) and its corresponding pre-layout simulation results usin...
ISCA
2000
IEEE
13 years 11 months ago
2000
IEEE
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...