770 search results - page 28 / 154 » Scalable stochastic processors |
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
— The customization of architectures in designing the security processor-based systems typically involves timeconsuming simulation and sophisticated analysis in the exploration o...
CP
2006
Springer
13 years 11 months ago
2006
Springer
This paper describes a complete and efficient solution to the stochastic allocation and scheduling for Multi-Processor System-on-Chip (MPSoC). Given a conditional task graph charac...
FPL
2009
Springer
14 years 2 days ago
2009
Springer
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
HPCA
2007
IEEE
14 years 7 months ago
2007
IEEE
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
VLDB
2007
ACM
14 years 7 months ago
2007
ACM
Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capa...