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» Scaling Soft Processor Systems
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CODES
2007
IEEE
14 years 1 months ago
Three-dimensional multiprocessor system-on-chip thermal optimization
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
Chong Sun, Li Shang, Robert P. Dick
CODES
2007
IEEE
14 years 1 months ago
ESL design and HW/SW co-verification of high-end software defined radio platforms
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
A. C. H. Ng, J. W. Weijers, Miguel Glassee, Thomas...
MICRO
2006
IEEE
144views Hardware» more  MICRO 2006»
14 years 1 months ago
Die Stacking (3D) Microarchitecture
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
Bryan Black, Murali Annavaram, Ned Brekelbaum, Joh...
ACMMSP
2006
ACM
260views Hardware» more  ACMMSP 2006»
14 years 1 months ago
Seven at one stroke: results from a cache-oblivious paradigm for scalable matrix algorithms
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
Michael D. Adams, David S. Wise
IPSN
2005
Springer
14 years 1 months ago
Design of a wireless sensor network platform for detecting rare, random, and ephemeral events
— We present the design of the eXtreme Scale Mote, a new sensor network platform for reliably detecting and classifying, and quickly reporting, rare, random, and ephemeral events...
Prabal Dutta, Mike Grimmer, Anish Arora, Steven B....