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FCCM
2002
IEEE
119views VLSI» more  FCCM 2002»
14 years 18 days ago
Using On-Chip Configurable Logic to Reduce Embedded System Software Energy
We examine the energy savings possible by re-mapping critical software loops from a microprocessor to configurable logic appearing on the same-chip in commodity chips now commerci...
Greg Stitt, Brian Grattan, Jason R. Villarreal, Fr...
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
13 years 11 months ago
Fault-tolerant average execution time optimization for general-purpose multi-processor system-on-chips
1 Fault-tolerance is due to the semiconductor technology development important, not only for safety-critical systems but also for general-purpose (non-safety critical) systems. How...
Mikael Väyrynen, Virendra Singh, Erik Larsson
ICPP
2006
IEEE
14 years 1 months ago
A Performance Model of the Krak Hydrodynamics Application
We present an analytic performance model of a largescale hydrodynamics code developed at Los Alamos National Laboratory. This modeling work is part of an ongoing effort to develop...
Kevin J. Barker, Scott Pakin, Darren J. Kerbyson
ENVSOFT
2008
120views more  ENVSOFT 2008»
13 years 7 months ago
Extension and evaluation of sensitivity analysis capabilities in a photochemical model
The decoupled direct method in three dimensions (DDM-3D) provides an efficient and accurate approach for probing the sensitivity of atmospheric pollutant concentrations to various...
S. L. Napelenok, D. S. Cohan, M. T. Odman, S. Tons...
ISCA
2010
IEEE
163views Hardware» more  ISCA 2010»
14 years 22 days ago
WiDGET: Wisconsin decoupled grid execution tiles
The recent paradigm shift to multi-core systems results in high system throughput within a specified power budget. However, future systems still require good single thread perfor...
Yasuko Watanabe, John D. Davis, David A. Wood