Sciweavers

860 search results - page 67 / 172
» Scaling Up Software Architecture Evaluation Processes
Sort
View
CLUSTER
2008
IEEE
14 years 2 months ago
Gather-arrange-scatter: Node-level request reordering for parallel file systems on multi-core clusters
—Multiple processors or multi-core CPUs are now in common, and the number of processes running concurrently is increasing in a cluster. Each process issues contiguous I/O request...
Kazuki Ohta, Hiroya Matsuba, Yutaka Ishikawa
AINA
2009
IEEE
14 years 2 months ago
Business Compliance Governance in Service-Oriented Architectures
Abstract — Governing business compliance with regulations, laws, best practices, contracts, and the like is not an easy task, and so far there are only limited software products ...
Florian Daniel, Fabio Casati, Vincenzo D'Andrea, E...
HPCA
2007
IEEE
14 years 8 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
DAC
2002
ACM
14 years 8 months ago
A fast on-chip profiler memory
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
Roman L. Lysecky, Susan Cotterell, Frank Vahid
ISPASS
2005
IEEE
14 years 1 months ago
Anatomy and Performance of SSL Processing
A wide spectrum of e-commerce (B2B/B2C), banking, financial trading and other business applications require the exchange of data to be highly secure. The Secure Sockets Layer (SSL...
Li Zhao, Ravi R. Iyer, Srihari Makineni, Laxmi N. ...