86 search results - page 8 / 18 » Scaling and Packing on a Chip Multiprocessor |
HPCA
2009
IEEE
14 years 10 months ago
2009
IEEE
Driven by continuing scaling of Moore's law, chip multiprocessors and systems-on-a-chip are expected to grow the core count from dozens today to hundreds in the near future. ...
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
To extend the exponential performance scaling of future chip multiprocessors, improving energy efficiency has become a first-class priority. Single-chip heterogeneous computing ha...
ISCA
2005
IEEE
14 years 3 months ago
2005
IEEE
This paper examines the area, power, performance, and design issues for the on-chip interconnects on a chip multiprocessor, attempting to present a comprehensive view of a class o...
HOTI
2008
IEEE
14 years 4 months ago
2008
IEEE
Much of high performance technical computing has moved from shared memory architectures to message based cluster systems. The development and wide adoption of the MPI parallel pro...
ISCA
2007
IEEE
14 years 3 months ago
2007
IEEE
High availability is an increasingly important requirement for enterprise systems, often valued more than performance. Systems designed for high availability typically use redunda...