1263 search results - page 159 / 253 » Scatter-Add in Data Parallel Architectures |
HPCA
2004
IEEE
14 years 9 months ago
2004
IEEE
Low disk throughput is one of the main impediments to improving the performance of data-intensive servers. In this paper, we propose two management techniques for the disk control...
ISQED
2008
IEEE
14 years 3 months ago
2008
IEEE
Off-chip communication consumes a significant part of main memory system power. Existing solutions imply the use of specialized memories or assume error free environments. This i...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
MorphoSys is a reconfigurable SIMD architecture. In this paper, a BSP-based ray tracing is gracefully mapped onto MorphoSys. The mapping highly exploits ray-tracing parallelism. A...
ICASSP
2008
IEEE
14 years 3 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
IPPS
2006
IEEE
14 years 3 months ago
2006
IEEE
As bioinformatics is an emerging application of high performance computing, this paper first evaluates the memory performance of several representative bioinformatics application...