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IEEEPACT
2006
IEEE
14 years 1 months ago
Complexity-based program phase analysis and classification
Modeling and analysis of program behavior are at the foundation of computer system design and optimization. As computer systems become more adaptive, their efficiency increasingly...
Chang-Burm Cho, Tao Li
IEEEPACT
2005
IEEE
14 years 1 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
CF
2010
ACM
14 years 25 days ago
On-chip communication and synchronization mechanisms with cache-integrated network interfaces
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
Stamatis G. Kavadias, Manolis Katevenis, Michail Z...
VIS
2004
IEEE
164views Visualization» more  VIS 2004»
14 years 9 months ago
Real-Time Motion Estimation and Visualization on Graphics Cards
We present a tool for real-time visualization of motion features in 2D image sequences. The motion is estimated through an eigenvector analysis of the spatiotemporal structure ten...
Christoph S. Garbe, Robert Strzodka
HPCA
2009
IEEE
14 years 8 months ago
iCFP: Tolerating all-level cache misses in in-order processors
Growing concerns about power have revived interest in in-order pipelines. In-order pipelines sacrifice single-thread performance. Specifically, they do not allow execution to flow...
Andrew D. Hilton, Santosh Nagarakatte, Amir Roth