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» Scenario-based Validation of Embedded Systems
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UML
2004
Springer
14 years 11 days ago
SVERTS - Specification and Validation of Real-Time and Embedded Systems
: This paper presents an overview on the workshop on Specification and Validation of Real-time and embedded Systems that has taken place for the second time in association with the...
Susanne Graf, Øystein Haugen, Ileana Ober, ...
SAC
2003
ACM
14 years 8 days ago
Validation of Code-Improving Transformations for Embedded Systems
Programmers of embedded systems often develop software in assembly code due to inadequate support from compilers and the need to meet critical speed and/or space constraints. Many...
Robert van Engelen, David B. Whalley, Xin Yuan
HASE
2007
IEEE
13 years 11 months ago
Validation Support for Distributed Real-Time Embedded Systems in VDM++
We present a tool-supported approach to the validation of system-level timing properties in formal models of distributed real-time embedded systems. Our aim is to provide system a...
John S. Fitzgerald, Simon Tjell, Peter Gorm Larsen...
FDL
2008
IEEE
13 years 8 months ago
Scenario-based Validation of Embedded Systems
This paper describes a scenario-based methodology em-level design validation based on the Abstract State Machines formal method. This scenario-based approach complements an existi...
Angelo Gargantini, Elvinia Riccobene, Patrizia Sca...
DAC
1998
ACM
13 years 11 months ago
A Geographically Distributed Framework for Embedded System Design and Validation
The di culty of embedded system co-design is increasing rapidly due to the increasing complexity of individual parts, the variety of parts available and pressure to use multiple p...
Ken Hines, Gaetano Borriello