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» Scenarios and Techniques for Choreography Design
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ARC
2006
Springer
157views Hardware» more  ARC 2006»
14 years 16 days ago
PISC: Polymorphic Instruction Set Computers
We introduce a new paradigm in the computer architecture referred to as Polymorphic Instruction Set Computers (PISC). This new paradigm, in difference to RISC/CISC, introduces hard...
Stamatis Vassiliadis, Georgi Kuzmanov, Stephan Won...
COMPSEC
2008
116views more  COMPSEC 2008»
13 years 9 months ago
Enforcing memory policy specifications in reconfigurable hardware
While general-purpose processor based systems are built to enforce memory protection to prevent the unintended sharing of data between processes, current systems built around reco...
Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timo...
TIFS
2010
137views more  TIFS 2010»
13 years 3 months ago
On the dynamic selection of biometric fusion algorithms
Biometric fusion consolidates the output of multiple biometric classifiers to render a decision about the identity of an individual. We consider the problem of designing a fusion s...
Mayank Vatsa, Richa Singh, Afzel Noore, Arun Ross
GLVLSI
2005
IEEE
124views VLSI» more  GLVLSI 2005»
14 years 2 months ago
A first look at the interplay of code reordering and configurable caches
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
Ann Gordon-Ross, Frank Vahid, Nikil Dutt
ATC
2008
Springer
13 years 10 months ago
Scheduling for Reliable Execution in Autonomic Systems
Abstract. Scheduling the execution of multiple concurrent tasks on shared resources such as CPUs and network links is essential to ensuring the reliable operation of many autonomic...
Terry Tidwell, Robert Glaubius, Christopher D. Gil...