174 search results - page 17 / 35 » Schedule-aware performance estimation of communication archi... |
ANCS
2006
ACM
13 years 11 months ago
2006
ACM
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
In this paper we present a novel use of an FPGA as a computing element for streaming based application. We investigate the virtualized execution of dynamic reconfigurable tasks. We...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
WH
2010
13 years 2 months ago
2010
Body Sensor Networks (BSNs) consist of sensor nodes deployed on the human body for health monitoring. Each sensor node is implemented by interfacing a physiological sensor with a ...
CODES
1999
IEEE
14 years 9 days ago
1999
IEEE
We present a case study on the design of a heterogeneous architecture for MPEG-2 video decoding. The primary objective of the case study is the validation of the SPADE methodology...