o much higher levels of abstraction than today's design practices, which are usually at the level of synthesizable RTL for custom hardware or Instruction Set Simulator (ISS) f...
Mark Genoe, Christopher K. Lennard, Joachim Kunkel...
This paper discusses our implementation and experience with a camera-based whiteboard scanner. The ZombieBoard system (so called because it brings to electronic life the marks on a...
Processor cycle time continues to decrease faster than main memory access times, placing higher demands on cache memory hierarchy performance. To meet these demands, conventional ...
Alvin R. Lebeck, David R. Raymond, Chia-Lin Yang, ...
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
This paper assumes a set of n mobile sensors that move in the Euclidean plane as a swarm1 . Our objectives are to explore a given geographic region by detecting and aggregating sp...