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ECRTS
1999
IEEE
14 years 23 hour ago
Scheduling coprocessor for enhanced least-laxity-first scheduling in hard real-time systems
Scheduling time impact on system performance increases especially when using dynamic priority algorithms, because of the enlarged computational effort at runtime. This overhead ca...
Jens Hildebrandt, Frank Golatowski, Dirk Timmerman...
ECRTS
2008
IEEE
14 years 2 months ago
A Hierarchical Multiprocessor Bandwidth Reservation Scheme with Timing Guarantees
A multiprocessor scheduling scheme is presented for supporting hierarchical containers that encapsulate sporadic soft and hard real-time tasks. In this scheme, each container is a...
Hennadiy Leontyev, James H. Anderson
LCTRTS
2009
Springer
14 years 2 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava
VLSID
2009
IEEE
143views VLSI» more  VLSID 2009»
14 years 8 months ago
SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache reconfiguration is a promising approach for reducing energy consumption as well...
Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
ISQED
2008
IEEE
186views Hardware» more  ISQED 2008»
14 years 2 months ago
Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
Foad Dabiri, Navid Amini, Mahsan Rofouei, Majid Sa...