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IPPS
2007
IEEE
14 years 3 months ago
Optimization and evaluation of parallel I/O in BIPS3D parallel irregular application
This paper presents the optimization and evaluation of parallel I/O for the BIPS3D parallel irregular application, a 3-dimensional simulation of BJT and HBT bipolar devices. The p...
Rosa Filgueira, David E. Singh, Florin Isaila, Jes...
DAC
2001
ACM
14 years 9 months ago
Transformations for the Synthesis and Optimization of Asynchronous Distributed Control
Asynchronous design has been the focus of renewed interest. However, a key bottleneck is the lack of high-quality CAD tools for the synthesis of large-scale systems which also all...
Michael Theobald, Steven M. Nowick
ICCD
2001
IEEE
121views Hardware» more  ICCD 2001»
14 years 5 months ago
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages
Dynamic power is the main source of power consumption in CMOS circuits. It depends on the square of the supply voltage. It may significantly be reduced by scaling down the supply ...
Noureddine Chabini, El Mostapha Aboulhamid, Yvon S...
ICDE
2007
IEEE
193views Database» more  ICDE 2007»
14 years 10 months ago
Categorization and Optimization of Synchronization Dependencies in Business Processes
requirement. Furthermore, programming using sequence constructs normally produce nested structures and The current approachfor modeling synchronization in scattered code, especiall...
Qinyi Wu, Calton Pu, Akhil Sahai, Roger S. Barga
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
14 years 2 months ago
Optimal module and voltage assignment for low-power
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
Deming Chen, Jason Cong, Junjuan Xu