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ISCA
2003
IEEE
144views Hardware» more  ISCA 2003»
14 years 4 months ago
Half-Price Architecture
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...
Ilhyun Kim, Mikko H. Lipasti
ITCC
2003
IEEE
14 years 4 months ago
Timed Petri Net Representation of the Synchronized Multimedia Integration Language (SMIL) of XML
A multimedia server needs to satisfy the temporal ordering of multimedia data streams when servicing a client. Multimedia data has high bandwidth requirements, and within a networ...
Soon Myoung Chung, Anil L. Pereira
CP
2003
Springer
14 years 4 months ago
Cost-Based Filtering for Shorter Path Constraints
Abstract. Many real world problems, e.g. personnel scheduling and transportation planning, can be modeled naturally as Constrained Shortest Path Problems (CSPPs), i.e., as Shortest...
Meinolf Sellmann
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
14 years 4 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi
ICPP
2002
IEEE
14 years 4 months ago
Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications
Code size expansion of software-pipelined loops is a critical problem for DSP systems with strict code size constraint. Some ad-hoc code size reduction techniques were used to try...
Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha