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» Scheduling techniques for media-on-demand
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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
14 years 3 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
CP
2008
Springer
13 years 11 months ago
An Application of Constraint Programming to Superblock Instruction Scheduling
Modern computer architectures have complex features that can only be fully taken advantage of if the compiler schedules the compiled code. A standard region of code for scheduling ...
Abid M. Malik, Michael Chase, Tyrel Russell, Peter...
ICMCS
2007
IEEE
123views Multimedia» more  ICMCS 2007»
14 years 4 months ago
Efficient Parallelization of H.264 Decoding with Macro Block Level Scheduling
The H.264 decoder has a sequential, control intensive front end that makes it difficult to leverage the potential performance of emerging manycore processors. Preparsing is a fun...
Jike Chong, Nadathur Satish, Bryan C. Catanzaro, K...
CASES
2007
ACM
14 years 1 months ago
A backtracking instruction scheduler using predicate-based code hoisting to fill delay slots
Delayed branching is a technique to alleviate branch hazards without expensive hardware branch prediction mechanisms. For VLIW processors with deep pipelines and many issue slots,...
Tom Vander Aa, Bingfeng Mei, Bjorn De Sutter
OSDI
1996
ACM
13 years 11 months ago
CPU Inheritance Scheduling
Traditional processor scheduling mechanisms in operating systems are fairly rigid, often supportingonly one fixed scheduling policy, or, at most, a few "scheduling classes&qu...
Bryan Ford, Sai Susarla