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DAC
2004
ACM
16 years 5 months ago
Efficient power/ground network analysis for power integrity-driven design methodology
As technology advances, the metal width is decreasing with the length increasing, making the resistance along the power line increase substantially. Together with the nonlinear sc...
Su-Wei Wu, Yao-Wen Chang
ISCAS
2008
IEEE
104views Hardware» more  ISCAS 2008»
15 years 10 months ago
An offset compensation technique for bandgap voltage reference in CMOS technology
— A precision integrated bandgap voltage reference in 0.35μm CMOS technology is here presented. The circuit uses natural npn bipolar transistors as reference diodes. A particula...
Stefano Ruzza, Enrico Dallago, Giuseppe Venchi, Se...
WCNC
2008
IEEE
15 years 10 months ago
Analysis of Interference from Large Clusters as Modeled by the Sum of Many Correlated Lognormals
Abstract—We examine the statistical distribution of the interference produced by a cluster of very many co-channel interferers, e.g., a sensor network, or a city full of active w...
Sebastian S. Szyszkowicz, Halim Yanikomeroglu
ISCAS
2007
IEEE
105views Hardware» more  ISCAS 2007»
15 years 10 months ago
Parallel current-steering D/A Converters for Flexibility and Smartness
—This paper presents a DAC architecture built on parallel current-steering sub-DAC entities. Two main novelties are explored: flexibility and smartness. Firstly, a number of avai...
Georgi I. Radulov, Patrick J. Quinn, Pieter Harpe,...
GLVLSI
2003
IEEE
310views VLSI» more  GLVLSI 2003»
15 years 9 months ago
54x54-bit radix-4 multiplier based on modified booth algorithm
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...