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» Secure Configuration of Field Programmable Gate Arrays
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FPL
2001
Springer
92views Hardware» more  FPL 2001»
14 years 3 months ago
Secure Configuration of Field Programmable Gate Arrays
Although SRAM programmed Field Programmable Gate Arrays (FPGA's) have come to dominate the industry due to their density and performance advantages over non-volatile technolog...
Tom Kean
IPPS
2006
IEEE
14 years 5 months ago
Securing embedded programmable gate arrays in secure circuits
The purpose of this article is to propose a survey of possible approaches for implementing embedded reconfigurable gate arrays into secure circuits. A standard secure interfacing ...
Nicolas Valette, Lionel Torres, Gilles Sassatelli,...
IAJIT
2010
84views more  IAJIT 2010»
13 years 9 months ago
A Test Procedure for Boundary Scan Circuitry in PLDs and FPGAs
: A test procedure for testing mainly the boundary scan cells, and testing partially the test access port controller in programmable logic devices, and field programmable gate arra...
Bashar Al-Khalifa
CATA
2009
14 years 3 days ago
Built-in Self-Test for Memory Resources in Virtex-4 Field Programmable Gate Arrays
ABSTRACT: We present a Built-In Self-Test (BIST) approach for programmable embedded memories in Xilinx Virtex-4 Field Programmable Gate Arrays (FPGAs). The target resources are the...
Brooks R. Garrison, Daniel T. Milton, Charles E. S...
DAC
1999
ACM
14 years 12 months ago
Robust FPGA Intellectual Property Protection Through Multiple Small Watermarks
A number of researchers have proposed using digital marks to provide ownership identification for intellectual property. Many of these techniques share three specific weaknesses: ...
John Lach, William H. Mangione-Smith, Miodrag Potk...