325 search results - page 13 / 65 » Secure Configuration of Field Programmable Gate Arrays |
FPL
2004
Springer
14 years 26 days ago
2004
Springer
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
AHS
2006
IEEE
13 years 11 months ago
2006
IEEE
The following article describes and discusses the suitability of the particle swarm optimization (PSO) for the employment with blind adaptation of the directional characteristic o...
DELTA
2008
IEEE
14 years 1 months ago
2008
IEEE
Scheduling of concurrent processors in a real-time image processing system on FPGA (Field programmable gate array) hardware is a not a trivial task. We propose a number of graphic...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
EH
2003
IEEE
14 years 23 days ago
2003
IEEE
Reconfigurable hardware devices make it possible to change the topology of electronic circuits at runtime. Using reconfigurable devices as a platform for Evolvable hardware (EHW) ...