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» Secure Configuration of Field Programmable Gate Arrays
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ICRA
2010
IEEE
245views Robotics» more  ICRA 2010»
13 years 6 months ago
2000 fps real-time vision system with high-frame-rate video recording
—This paper introduces a high-speed vision system called IDP Express, which can execute real-time image processing and high frame rate video recording simultaneously. In IDP Expr...
Idaku Ishii, Tetsuro Tatebe, Qingyi Gu, Yuta Moriu...
ERSA
2010
217views Hardware» more  ERSA 2010»
13 years 5 months ago
FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images
The pixel purity index algorithm is employed in remote sensing for analyzing hyperspectral images. A single pixel usually covers several different materials, and its observed spect...
Carlos González, Daniel Mozos, Javier Resan...
FPL
2007
Springer
101views Hardware» more  FPL 2007»
14 years 1 months ago
Formal Modeling of Process Migration
This paper develops a formal model of process migration that describes programs, processes, and the migration of those processes within a migration realm. A migration realm is a g...
Aric D. Blumer, Henning S. Mortveit, Cameron D. Pa...
CEC
2005
IEEE
14 years 1 months ago
FPGA segmented channel routing using genetic algorithms
A genetic algorithm approach for segmented channel routing in field programmable gate arrays (FPGA's) is presented in this paper. The FPGA segmented channel routing problem (F...
Lipo Wang, Lei Zhou, Wen Liu
IPPS
2005
IEEE
14 years 1 months ago
Experiences with Soft-Core Processor Design
Soft-core processors exploit the flexibility of Field Programmable Gate Arrays (FPGAs) to allow a system designer to customize the processor to the needs of a target application....
Franjo Plavec, Blair Fort, Zvonko G. Vranesic, Ste...