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» Secure Configuration of Field Programmable Gate Arrays
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CTRSA
2001
Springer
140views Cryptology» more  CTRSA 2001»
13 years 12 months ago
Fast Implementation and Fair Comparison of the Final Candidates for Advanced Encryption Standard Using Field Programmable Gate A
The results of fast implementations of all five AES final candidates using Virtex Xilinx Field Programmable Gate Arrays are presented and analyzed. Performance of several alternati...
Kris Gaj, Pawel Chodowiec
IJVR
2007
202views more  IJVR 2007»
13 years 7 months ago
Full Solid Angle Panoramic Viewing by Depth Image Warping on Field Programmable Gate Array
—To construct 3D virtual scenes from two-dimensional images with depth information, image warping techniques could be used. In this paper, a novel approach of cylindrical depth i...
Xiaoying Li, Baoquan Liu, Enhua Wu
IPPS
2003
IEEE
14 years 22 days ago
Some Modular Adders and Multipliers for Field Programmable Gate Arrays
This paper is devoted to the study of number representations and algorithms leading to efficient implementations of modular adders and multipliers on recent Field Programmable Ar...
Jean-Luc Beuchat
FPL
2006
Springer
118views Hardware» more  FPL 2006»
13 years 11 months ago
Activity Estimation for Field-Programmable Gate Arrays
This paper examines various activity estimation techniques in order to determine which are most appropriate for use in the context of field-programmable gate arrays (FPGAs). Speci...
Julien Lamoureux, Steven J. E. Wilton
DSD
2007
IEEE
160views Hardware» more  DSD 2007»
14 years 1 months ago
Alternatives in Designing Level-Restoring Buffers for Interconnection Networks in Field-Programmable Gate Arrays
Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...
Scott Miller, Mihai Sima, Michael McGuire