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» Secure Configuration of Field Programmable Gate Arrays
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ITC
2003
IEEE
149views Hardware» more  ITC 2003»
14 years 22 days ago
BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study
Abstract: We discuss the development of Built-In SelfTest (BIST) configurations that test all of the programmable logic and interconnect resources in the core of Xilinx 4000E, 4000...
Charles E. Stroud, Keshia N. Leach, Thomas A. Slau...
IPPS
2003
IEEE
14 years 22 days ago
Parallel Direct Solution of Linear Equations on FPGA-Based Machines
The efficient solution of large systems of linear equations represented by sparse matrices appears in many tasks. LU factorization followed by backward and forward substitutions i...
Xiaofang Wang, Sotirios G. Ziavras
ICCD
2005
IEEE
246views Hardware» more  ICCD 2005»
14 years 4 months ago
H-SIMD Machine: Configurable Parallel Computing for Matrix Multiplication
FPGAs (Field-Programmable Gate Arrays) are often used as coprocessors to boost the performance of dataintensive applications [1, 2]. However, mapping algorithms onto multimillion-...
Xizhen Xu, Sotirios G. Ziavras
FPL
2000
Springer
95views Hardware» more  FPL 2000»
13 years 11 months ago
It's FPL, Jim - But Not as We Know It! Opportunities for the New Commercial Architectures
Following the simple Programmable Logic Device (SPLD) and Field Programmable Gate Array (FPGA) generations a third generation of programmable logic technologies is now reaching the...
Tom Kean
FPL
2008
Springer
110views Hardware» more  FPL 2008»
13 years 9 months ago
Automatic generation of run-time parameterizable configurations
In many applications, subsequent data manipulations differ only in a small set of parameter values. Because of their reconfigurability, FPGAs (Field Programmable Gate Arrays) can ...
Karel Bruneel, Dirk Stroobandt