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ENTCS
2006
176views more  ENTCS 2006»
13 years 8 months ago
Automatic Formal Synthesis of Hardware from Higher Order Logic
A compiler that automatically translates recursive function definitions in higher order logic to clocked synchronous hardware is described. Compilation is by mechanised proof in t...
Mike Gordon, Juliano Iyoda, Scott Owens, Konrad Sl...
SPEECH
2011
13 years 3 months ago
The Romanian speech synthesis (RSS) corpus: Building a high quality HMM-based speech synthesis system using a high sampling rate
This paper first introduces a newly-recorded high quality Romanian speech corpus designed for speech synthesis, called “RSS”, along with Romanian front-end text processing mo...
Adriana Stan, Junichi Yamagishi, Simon King, Matth...
CSFW
2009
IEEE
14 years 21 days ago
Cryptographic Protocol Synthesis and Verification for Multiparty Sessions
We present the design and implementation of a compiler that, given high-level multiparty session descriptions, generates custom cryptographic protocols. Our sessions specify pre-a...
Karthikeyan Bhargavan, Ricardo Corin, Pierre-Malo ...
ACSD
2004
IEEE
113views Hardware» more  ACSD 2004»
14 years 16 days ago
Logic Synthesis for Asynchronous Circuits Based on Petri Net Unfoldings and Incremental SAT
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
Victor Khomenko, Maciej Koutny, Alexandre Yakovlev
DAC
1994
ACM
14 years 27 days ago
Statistical Delay Modeling in Logic Design and Synthesis
Manufacturing disturbances are inevitable in the fabrication of integrated circuits. These disturbances will result in variations in the delay speci cations of manufactured circui...
Horng-Fei Jyu, Sharad Malik