1210 search results - page 30 / 242 » Secure Logic Synthesis |
DATE
1997
IEEE
14 years 2 months ago
1997
IEEE
In modern computer systems the performance is dominated by the memory performance. Currently, there is neither a systematic design methodology nor a tool for the design of memory ...
TCAD
2008
13 years 9 months ago
2008
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
TCAD
2008
13 years 9 months ago
2008
Abstract--This paper proposes an adaptive watermarking technique by modulating some closed cones in an originally optimized logic network (master design) for technology mapping. Th...
ICCAD
2009
IEEE
13 years 7 months ago
2009
IEEE
As CMOS devices are scaled down into the nanometer regime, concerns about reliability are mounting. Instead of viewing nanoscale characteristics as an impediment, technologies suc...
ICCAD
2007
IEEE
14 years 6 months ago
2007
IEEE
— Small gates, such as AND2, XOR2 and MUX2, have been mixed with lookup tables (LUTs) inside the programmable logic block (PLB) to reduce area and power and increase performance ...