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» Secure Partial Reconfiguration of FPGAs
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FPL
2005
Springer
140views Hardware» more  FPL 2005»
14 years 1 months ago
A Configuration Memory Architecture for Fast Run-Time-Reconfiguration of FPGAs
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
Usama Malik, Oliver Diessel
SBCCI
2004
ACM
111views VLSI» more  SBCCI 2004»
14 years 27 days ago
A partial reconfigurable architecture for controllers based on Petri nets
Digital Control System in the industry has been used in most of the applications based on expensive Programmable Logical Controllers (PLC). These Systems are, in general, highly c...
Paulo Sérgio B. do Nascimento, Paulo Romero...
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
14 years 1 months ago
Autonomous System on a Chip Adaptation through Partial Runtime Reconfiguration
This paper presents a proto-type autonomous signal processing system on a chip. The system is architected such that high performance digital signal processing occurs in the FPGA...
Matthew French, Erik Anderson, Dong-In Kang
RECONFIG
2009
IEEE
165views VLSI» more  RECONFIG 2009»
14 years 2 months ago
Composable and Persistent-State Application Swapping on FPGAs Using Hardwired Network on Chip
—We envision that future FPGA will use a hardwired network on chip (HWNoC) [14] as a unified interconnect for functional communications (data and control) as well as configurat...
Muhammad Aqeel Wahlah, Kees G. W. Goossens
IEICET
2008
124views more  IEICET 2008»
13 years 7 months ago
A Secure Content Delivery System Based on a Partially Reconfigurable FPGA
We developed a content delivery system using a partially reconfigurable FPGA to securely distribute digital content on the Internet. With partial reconfigurability of a Xilinx Vir...
Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Ke...