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CODES
2005
IEEE
14 years 2 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
ISCA
2005
IEEE
119views Hardware» more  ISCA 2005»
14 years 2 months ago
Rescue: A Microarchitecture for Testability and Defect Tolerance
Scaling feature size improves processor performance but increases each device’s susceptibility to defects (i.e., hard errors). As a result, fabrication technology must improve s...
Ethan Schuchman, T. N. Vijaykumar
ACMMSP
2005
ACM
101views Hardware» more  ACMMSP 2005»
14 years 2 months ago
Transparent pointer compression for linked data structures
64-bit address spaces are increasingly important for modern applications, but they come at a price: pointers use twice as much memory, reducing the effective cache capacity and m...
Chris Lattner, Vikram S. Adve
UML
2005
Springer
14 years 2 months ago
Bridging Grammarware and Modelware
Abstract. In Software Engineering many text-based languages and supporting tools are used, forming the grammarware technical space. Currently model driven engineering is the new em...
Manuel Wimmer, Gerhard Kramler
CP
2004
Springer
14 years 2 months ago
Generating Robust Partial Order Schedules
This paper considers the problem of transforming a resource feasible, fixed-times schedule into a partial order schedule (POS) to enhance its robustness and stability properties. ...
Nicola Policella, Angelo Oddi, Stephen F. Smith, A...