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» Selectional Restrictions in HPS
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FPL
2009
Springer
161views Hardware» more  FPL 2009»
14 years 2 months ago
A multi-FPGA architecture for stochastic Restricted Boltzmann Machines
Although there are many neural network FPGA architectures, there is no framework for designing large, high-performance neural networks suitable for the real world. In this paper, ...
Daniel L. Ly, Paul Chow
ICASSP
2011
IEEE
13 years 1 months ago
Semantic data selection for vertical business voice search
Local business voice search is a popular application for mobile phones, where hands-free interaction and speed are critical to users. However, speech recognition accuracy is still...
Giuseppe Di Fabbrizio, Diamantino Caseiro, Amanda ...
ACL
1994
13 years 11 months ago
Verb Semantics and Lexical Selection
This paper will focus on the semantic representation of verbs in computer systems and its impact on lexical selection problems in machine translation (MT). Two groups of English a...
Zhibiao Wu, Martha Stone Palmer
TC
2011
13 years 4 months ago
Software-Based Cache Coherence with Hardware-Assisted Selective Self-Invalidations Using Bloom Filters
— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing cohere...
Thomas J. Ashby, Pedro Diaz, Marcelo Cintra
IEEEPACT
2009
IEEE
13 years 7 months ago
Region Based Structure Layout Optimization by Selective Data Copying
As the gap between processor and memory continues to grow, memory performance becomes a key performance bottleneck for many applications. Compilers therefore increasingly seek to m...
Sandya S. Mannarswamy, Ramaswamy Govindarajan, Ris...