376 search results - page 30 / 76 » Self-Assembled Circuit Patterns |
119
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ICCAD
1995
IEEE
15 years 7 months ago
1995
IEEE
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
127
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TCAD
1998
15 years 3 months ago
1998
—A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
119
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ITC
1997
IEEE
15 years 7 months ago
1997
IEEE
A deterministic BIST scheme is presented which requires less hardware overhead than pseudo-random BIST but obtains better or even complete fault coverage at the same time. It take...
141
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FCCM
2004
IEEE
15 years 7 months ago
2004
IEEE
In this paper we advocate the use of pre-decoding for CAM-based pattern matching. We implement an FPGA based sub-system for NIDS (Snort) pattern matching using a combination of te...
207
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UC
2010
Springer
15 years 1 months ago
2010
Springer
We study Life-like cellular automaton rule B2/S2345. This automaton exhibits a chaotic behavior yet capable for purposeful computation. The automaton implements Boolean gates via p...