Sciweavers

376 search results - page 46 / 76
» Self-Assembled Circuit Patterns
Sort
View
DAC
1997
ACM
13 years 11 months ago
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology
Multi-threshold CMOS is an increasingly popular circuit approach that enables high performance and low power operation. However, no methodologies have been developed to size the h...
James Kao, Anantha Chandrakasan, Dimitri Antoniadi...
FPL
2006
Springer
140views Hardware» more  FPL 2006»
13 years 11 months ago
A Thermal Management and Profiling Method for Reconfigurable Hardware Applications
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
Phillip H. Jones, John W. Lockwood, Young H. Cho
HAPTICS
2006
IEEE
14 years 1 months ago
Two-dimensional Scanning Tactile Display using Ultrasound Radiation Pressure
In this paper, we propose a new tactile display which produces spatio-temporal stress patterns on a 2-D plane. The first prototype of the display consists of an octagonal arrange...
Takayuki Iwamoto, Hiroyuki Shinoda
VLSID
2005
IEEE
131views VLSI» more  VLSID 2005»
14 years 8 months ago
Efficient Space/Time Compression to Reduce Test Data Volume and Testing Time for IP Cores
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
Lei Li, Krishnendu Chakrabarty, Seiji Kajihara, Sh...
HICSS
2003
IEEE
138views Biometrics» more  HICSS 2003»
14 years 27 days ago
Towards Verifying Parametrised Hardware Libraries with Relative Placement Information
Abstract— This paper presents a framework for verifying compilation tools for parametrised hardware libraries with placement information. Such libraries are captured in Pebble, a...
Steve McKeever, Wayne Luk, Arran Derbyshire