376 search results - page 56 / 76 » Self-Assembled Circuit Patterns |
ISMVL
2000
IEEE
13 years 12 months ago
2000
IEEE
We have developed two novel methods of fabricating very small Si single-electron transistors (SETs), called PAtternDependent OXidation (PADOX) and Vertical PAttern-Dependent OXida...
NOCS
2008
IEEE
14 years 1 months ago
2008
IEEE
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
IOLTS
2000
IEEE
13 years 12 months ago
2000
IEEE
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
IPPS
2003
IEEE
14 years 25 days ago
2003
IEEE
With the current trend in integration of more complex systems on chip there is a need for better communication infrastructure on chip that will increase the available bandwidth an...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...