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SAMOS
2004
Springer
14 years 3 months ago
Scalable Instruction-Level Parallelism.
This paper presents a model for instruction-level distributed computing that allows the implementation of scalable chip multiprocessors. Based on explicit microthreading it serves ...
Chris R. Jesshope
ISORC
2002
IEEE
14 years 2 months ago
Reactive Objects
Object-oriented, concurrent, and event-based programming models provide a natural framework in which to express the behavior of distributed and embedded software systems. However,...
Johan Nordlander, Mark P. Jones, Magnus Carlsson, ...
VEE
2006
ACM
126views Virtualization» more  VEE 2006»
14 years 3 months ago
A new approach to real-time checkpointing
The progress towards programming methodologies that simplify the work of the programmer involves automating, whenever possible, activities that are secondary to the main task of d...
Antonio Cunei, Jan Vitek
CASES
2007
ACM
14 years 2 months ago
Rethinking custom ISE identification: a new processor-agnostic method
The last decade has witnessed the emergence of the Application Specific Instruction-set Processor (ASIP) as a viable platform for embedded systems. Extensible ASIPs allow the user...
Ajay K. Verma, Philip Brisk, Paolo Ienne
CASES
2007
ACM
14 years 2 months ago
Performance optimal processor throttling under thermal constraints
We derive analytically, the performance optimal throttling curve for a processor under thermal constraints for a given task sequence. We found that keeping the chip temperature co...
Ravishankar Rao, Sarma B. K. Vrudhula