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» Self-Testing of FPGA Delay Faults in the System Environment
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ICES
2005
Springer
176views Hardware» more  ICES 2005»
14 years 14 days ago
Consensus-Based Evaluation for Fault Isolation and On-line Evolutionary Regeneration
While the fault repair capability of Evolvable Hardware (EH) approaches have been previously demonstrated, further improvements to fault handling capability can be achieved by exp...
Kening Zhang, Ronald F. DeMara, Carthik A. Sharma
IPPS
2009
IEEE
14 years 1 months ago
Crash fault detection in celerating environments
Failure detectors are a service that provides (approximate) information about process crashes in a distributed system. The well-known “eventually perfect” failure detector, 3P...
Srikanth Sastry, Scott M. Pike, Jennifer L. Welch
GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
14 years 1 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
IJNSEC
2008
166views more  IJNSEC 2008»
13 years 7 months ago
Countermeasures for Hardware Fault Attack in Multi-Prime RSA Cryptosystems
The study of countermeasures for hardware fault attack in multi-prime RSA cryptosystems is very important for applications such as computer network and smart cards. In this paper,...
Zine-Eddine Abid, Wei Wang
NCA
2008
IEEE
14 years 1 months ago
Finite Memory: A Vulnerability of Intrusion-Tolerant Systems
In environments like the Internet, faults follow unusual patterns, dictated by the combination of malicious attacks with accidental faults such as long communication delays caused...
Giuliana Santos Veronese, Miguel Correia, Lau Cheu...