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DAC
2012
ACM
11 years 9 months ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra
DSN
2004
IEEE
13 years 11 months ago
An Architectural Framework for Providing Reliability and Security Support
This paper explores hardware-implemented error-detection and security mechanisms embedded as modules in a hardware-level framework called the Reliability and Security Engine (RSE)...
Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar K. ...
VLSID
2003
IEEE
103views VLSI» more  VLSID 2003»
14 years 7 months ago
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program
In the previous work, the problem of nding gate delays to eliminate glitches has been solved by linear programs (LP) requiring an exponentially large number ofconstraints. By intr...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...
IEEEPACT
2005
IEEE
14 years 29 days ago
A Distributed Control Path Architecture for VLIW Processors
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
Hongtao Zhong, Kevin Fan, Scott A. Mahlke, Michael...
VLSI
2007
Springer
14 years 1 months ago
An efficient heterogeneous reconfigurable functional unit for an adaptive dynamic extensible processor
Replacing functional units of an extensible processor with reconfigurable functional units enhances performance and flexibility of processors to execute custom instructions. That ...
Arash Mehdizadeh, Behnam Ghavami, Morteza Saheb Za...